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Get started with Virtex UltraScale+ FPGA SOM Development Platform

Unpacking

Remove the Development Platform from box and place in an ESD free area. Use anti-static pad/mat with proper grounding to place the Development Platform. Also make sure that, below deliverables are received without any physical damage.

Development kit contains:

  • Virtex UltraScale+ FPGA SOM Development Platform
  • 15V, 22A Power Supply
  • Allen key
  • USB Debug cable
  • Fan sink (Integrated with Development Platform)
Virtex UltraScale+ Dev Kit image
Agilex5 Debug USB Cable
Agilex7 15V-22 Power Supply
Allen key

Virtex UltraScale+ FPGA SOM Development Platform

USB Debug Cable

15V, 22A Power Supply

Allen Key

Safety Guidelines

Environmental Compliance

iW-RainboW-G52D- Virtex UltraScale+ FPGA S O M Development Platform is designed by using RoHS and REACH compliant components and manufactured on lead free production process.

ESD Protection

This development platform is ESD sensitive. Handle the product only in accordance with the installation instructions given in the manual. Therefore ESD precautions should be taken care during transport and handling. Must use a ESD ground strap or other grounded source before unpacking or handling the hardware.

Product Disposal

Check the local regulations for disposal of electronic products before disposing.

Get to know​

Virtex UltraScale+ top image

Virtex UltraScale+ FPGA SOM – Top view

1. PMIC Programming Header

2. 12V Fan connector

Virtex UltraScale+ bottom image

Virtex UltraScale+ FPGA SOM– Bottom view

3. Board to Board connector 2
4. Board to Board connector 3

5. Board to Board connector 1

Virtex UltraScale FPGA Devkit pin image

Virtex UltraScale+ FPGA SOM Development Platform – Top view

1. Ethernet Connector2
2. Ethernet Connector1
3. MSIO Header
4. GPIO Header
5. USB3.0 Connector
6. Micro SD Connector
7. Board to Board Connector 2
8. QSFP112G Stacked Connector 2
9. Boot Media Selection Switch
10. Power Button
11. Power IN Connector
12. Power ON/OFF Switch
13. Debug Type-C Connector

14. Reset Button
15. HDMI IN Connector
16. PCIe Select Switch
17. HDMI Out Connector
18. SD Out BNC Connector
19. SD IN BNC Connector
20. PCIe x16 Connector
21. QSFP112G Stacked Connector 1
22. FMC+ Connector 2
23. Board to Board Connector 3
24. FMC+ Connector 1
25. FMC+ Connector 3
26. Board to Board Connector 1

Virtex UltraScale+ Devkit bottom image

Virtex UltraScale+ FPGA SOM Development Platform – Bottom view

27. PMOD Connector

28. RTC Coin Cell Holder

Note: Not all of the connectors mentioned above are compatible with the Virtex UltraScale+ FPGA SOM. Refer to the Development Kit’s datasheet for information on supported connectors and their detailed descriptions.

Download FTP Contents

All the technical resources of iW-RainboW-G52D Virtex Ultrascale+ FPGA SOM Development platform is available in iWave FTP server.

FTP Folder structure

For FTP Credentials, Contact : mktg@iwave-global.com

Boot Switch Setting

Make sure that Boot Mode Switch (SW6) in the carrier board is set for eMMC boot as shown below

Virtex UltraScale FPGA Devkit switch view

SW6-Boot selection Switch

Virtex UltraScale+ Switch table image

Note: Bits 3 and 4 of SW 6 are not utilized, so their state is considered “don’t care” and can be set to either ON or OFF.

Debug Port Setting

The Virtex UltraScale+ FPGA SOM Development Platform has a built-in JTAG emulator. Both JTAG and Debug UART can be accessed via a single USB-C connector (J6).

Connect Type A end of USB cable to PC and Type-C end of USB cable to Development platform’s Debug USB Type-C Connector (J6) as shown below.

Virtex UltraScale+ Debug port image

Install the driver for Debug Port in Host PC/Laptop using the
below link.
https://ftdichip.com/products/ft232rq/

How to configure

Use one of the terminal application depending on the operating system of the host machine:

JTAG Connection

iW-RainboW-G52D Virtex UltraScale+ FPGA SOM Development platform Support JTAG interface through Debug and JTAG Type-C Connector (J6) in Carrier Board for FPGA Programming and debugging. JTAG-SMT4 Programming module in carrier board supports both JTAG functionality.Ensure that Switch-4(SW4) in carrier board is turned OFF to select FPGA JTAG.

Virtex UltraScale+ JTAG Connect image

Powering ON

Connect the 15V power supply plug to the power connector (J4) of the Development platform as shown below and switch (SW3) ON the power supply. Once power is applied to the Development platform, the power LEDs in Virtex UltraScale+ FPGA BRYN Carrier Board will glow as shown in the below image.

Virtex UltraScale+ Powering image

Warning:

  • Do not try to connect any other Power Supply other than supplied along with the Development Platform.
  • Do not plug or remove the Virtex UltraScale+ FPGA SOM from carrier board with live power.
  • Contact iWave, if power LEDs are not glowing or Error status LEDs are glowing.

Boot Screen

User must go through “Software User Guide” and get familiar with software section of iW-RainboW-G52M-Virtex-UltraScale+DRA821U-OSM-SOM-GXD1.0-Linux6.1.80-SoftwareUserGuide.

Once power is applied to the Development Platform as explained in the previous section, boot messages being displayed in the debug terminal of the PC/Laptop which is connected to the Development platform. Press any key in terminal immediately to see the command prompt of the Boot loader or wait until OS boots.

Virtex UltraScale+ Uboot image

Command Prompt (Linux)

Virtex UltraScale+ Linux image

Command Prompt (Uboot)

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