Case Study: Build 5G radios with Xilinx Zynq UltraScale+ MPSoC System on Module

The next generation of wireless networks, 5G, is expected to increase data rates and capacity significantly, with peak data rates of up to 10 Gbps. 5G will also enable new services and applications such as virtual and augmented reality, which require low latency and high reliability. To meet these challenges, 5G radio systems must be able to process large amounts of data quickly and efficiently.

The system and service requirements for a 5G system include:

• Peak data rates over 10Gbps are the basic KPI for a 5G network
• Minimum guaranteed throughput of 50-100Mbps while accessing the internet
• End-to-end latency at the millisecond level
• Radio link latency less than 1ms to support tactile internet

5G use cases demand diverse and often challenging requirements, where a single solution to meet all the requirements might lead to over-engineering, complexity, and high development costs. Additionally, some applications and use cases for 5G networks may require high flexibility and scalability.

Xilinx Zynq UltraScale+ MPSoC platform for efficient 5G communication

Zynq UltraScale+ MPSoC modules are well suited for implementing 5G radio systems. The MPSoC’s FPGA fabric can be used for high-speed data processing, while the on-chip processor can be used for control and management tasks. The MPSoC’s high-speed I/O interfaces can be used for connectivity to external radios and antennas. In addition, the MPSoC’s power-efficient architecture makes it ideal for use in portable and battery-powered 5G radio devices.

The Zynq UltraScale+ MPSoC development platform offers a comprehensive and efficient computing platform for developing a 5G radio unit. It makes use of advanced FPGA technologies to achieve extreme performance and low power consumption while also providing unprecedented heterogeneous multiprocessing.

Key features of the ZU7/ZU5/ZU4 (CG/EG/EV) System on Module include

• Quad A53 @ 1.5GHz & Dual R5 @ 600MHz
• Up to 500K Logic Cells
• H.265, H.264 VCU & ARM Mali 400 MP2 GPU
• 64bit, 8GB PS DDR4 with ECC & 16bit, 4GB PL DDR4
• 16 x High-Speed transceivers @ 16.3Gbps
• 4 x PS transceivers @ 6Gbps
• 142 User Configurable IO’s

Implementing clock synchronization on the platform was challenging to provide reliable, efficient communication between the radio units.

With the development of new radio technologies and network architectures to boost efficiency and support demanding 5G use cases, the need for time synchronization has become more critical. The less accurate the clock source, the higher the probability of time shifts. And eventually, there will be performance challenges.

Given the importance of time synchronization, iWave proved that time synchronization equipment and connectivity can be successfully provided through the system to ensure that telecommunication networks operate properly.

Watchdog timers are supported both internally and externally to alert the system whose software has experienced a freeze or hang to reset it.

To support high-speed interfaces such as SFP+, the SoM is reinforced with 16 high-speed transceivers running at 16.3Gbps. SATA, PCIe, and USB3.0 are all supported by 6Gbps transceivers. As a result, the platform can be tailored to accommodate high-speed communication applications.

With the Zynq UltraScale+ MPSoC development module and comprehensive BSP support, developers can quickly begin prototyping and application development and then transition to production with the same hardware. This significantly shortens the time to market.

By leveraging an existing solution, using an off-the-shelf module with a carrier card reduces design time. A shorter development cycle means a quicker product launch. Furthermore, a SoM approach reduces engineering costs as well as other manufacturing costs.

More information on the Zynq UltraScale+ MPSoC System on Module and development kit can be found here.

If you have any further inquiries, please drop us an email at mktg@iwavesystems.com.

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